module lib1(in, out);
  input [63:0] in;
  output out;
  assign out = ^in;
endmodule

module lib2(in, out);
  input [63:0] in;
  output out;
  assign out = ^in;
endmodule

module lib3(in, out);
  input [63:0] in;
  output out;
  assign out = ^in;
endmodule
